The Influence of Malloc Placement on TSX Hardware Transactional Memory
Interesting paper:
We show that the placement
policies of dynamic storage allocators -- such as those found in common
"malloc" implementations -- can influence the L1 conflict miss rate in the L1.
Conflict misses -- sometimes called mapping misses -- arise because of less
than ideal associativity and represent imbalanced distribution of active memory
blocks over the set of available L1 indices. Under transactional execution
conflict misses may manifest as aborts, representing wasted or futile effort
instead of a simple stall as would occur in normal execution mode.
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